Publication: Real-Time Multi-Task ADAS Implementation on Reconfigurable Heterogeneous MPSoC Architecture
| dc.contributor.authors | Tatar G., BAYAR S. | |
| dc.date.accessioned | 2023-08-14T11:51:31Z | |
| dc.date.accessioned | 2026-01-11T18:03:10Z | |
| dc.date.available | 2023-08-14T11:51:31Z | |
| dc.date.issued | 2023-01-01 | |
| dc.description.abstract | The rapid adoption of Advanced Driver Assistance Systems (ADAS) in modern vehicles, aiming to elevate driving safety and experience, necessitates the real-time processing of high-definition video data. This requirement brings about considerable computational complexity and memory demands, highlighting a critical research void for a design integrating high FPS throughput with optimal Mean Average Precision (mAP) and Mean Intersection over Union (mIoU). Performance improvement at lower costs, multi-tasking ability on a single hardware platform, and flawless incorporation into memory-constrained devices are also essential for boosting ADAS performance. Addressing these challenges, this study proposes an ADAS multi-task learning hardware-software co-design approach underpinned by the Kria KV260 Multi-Processor System-on-Chip Field Programmable Gate Array (MPSoC-FPGA) platform. The approach facilitates efficient real-time execution of deep learning algorithms specific to ADAS applications. Utilizing the BDD100K, KITTI, and CityScapes datasets, our ADAS multi-task learning system endeavours to provide accurate and efficient multi-object detection, segmentation, and lane and drivable area detection in road images. The system deploys a segmentation-based object detection strategy, using a ResNet-18 backbone encoder and a Single Shot Detector architecture, coupled with quantization-aware training to augment inference performance without compromising accuracy. The ADAS multi-task learning offers customization options for various ADAS applications and can be further optimized for increased precision and reduced memory usage. Experimental results showcase the system’s capability to perform real-time multi-class object detection, segmentation, line detection, and drivable area detection on road images at approximately 25.4 FPS using a 1920x1080p Full HD camera. Impressively, the quantized model has demonstrated a 51% mAP for object detection, 56.62% mIoU for image segmentation, 43.86% mIoU for line detection, and 81.56% IoU for drivable area identification, reinforcing its high efficacy and precision. The findings underscore that the proposed ADAS multi-task learning system is a practical, reliable, and effective solution for real-world applications. | |
| dc.identifier.citation | Tatar G., BAYAR S., "Real-Time Multi-Task ADAS Implementation on Reconfigurable Heterogeneous MPSoC Architecture", IEEE Access, 2023 | |
| dc.identifier.doi | 10.1109/access.2023.3300379 | |
| dc.identifier.issn | 2169-3536 | |
| dc.identifier.uri | https://avesis.marmara.edu.tr/api/publication/6b882738-8a7a-45e8-9289-718c90d85559/file | |
| dc.identifier.uri | https://hdl.handle.net/11424/292485 | |
| dc.language.iso | eng | |
| dc.relation.ispartof | IEEE Access | |
| dc.rights | info:eu-repo/semantics/openAccess | |
| dc.subject | Bilgisayar Bilimleri | |
| dc.subject | Mühendislik ve Teknoloji | |
| dc.subject | Computer Sciences | |
| dc.subject | Engineering and Technology | |
| dc.subject | Mühendislik, Bilişim ve Teknoloji (ENG) | |
| dc.subject | Bilgisayar Bilimi | |
| dc.subject | Mühendislik | |
| dc.subject | Malzeme Bilimi | |
| dc.subject | Engineering, Computing & Technology (ENG) | |
| dc.subject | COMPUTER SCIENCE | |
| dc.subject | ENGINEERING | |
| dc.subject | MATERIALS SCIENCE | |
| dc.subject | Genel Bilgisayar Bilimi | |
| dc.subject | Fizik Bilimleri | |
| dc.subject | Genel Malzeme Bilimi | |
| dc.subject | Genel Mühendislik | |
| dc.subject | General Computer Science | |
| dc.subject | Physical Sciences | |
| dc.subject | General Materials Science | |
| dc.subject | General Engineering | |
| dc.subject | ADAS | |
| dc.subject | Artificial intelligence | |
| dc.subject | Computational modeling | |
| dc.subject | Computer architecture | |
| dc.subject | Deep learning | |
| dc.subject | Deep processing unit | |
| dc.subject | Field programmable gate arrays | |
| dc.subject | Graphics processing units | |
| dc.subject | Memory allocation | |
| dc.subject | Memory management | |
| dc.subject | MPSoC-FPGA architecture | |
| dc.subject | Multi-task learning | |
| dc.subject | Multitasking | |
| dc.subject | Quantization aware training | |
| dc.subject | Task analysis | |
| dc.subject | Training | |
| dc.subject | Vitis-AI | |
| dc.title | Real-Time Multi-Task ADAS Implementation on Reconfigurable Heterogeneous MPSoC Architecture | |
| dc.type | article | |
| dspace.entity.type | Publication |
Files
Original bundle
1 - 1 of 1
