Protecting code regions on asymmetrically reliable caches

Abstract

Cache structures in a multicore system are considerably susceptible to soft errors. Protecting all caches using fault tolerance techniques has notable overheads on performance and power consumption. In this paper, we propose an enhanced protection mechanism for reliabilitybased critical code regions of the applications on asymmetrically reliable cores which have different error-tolerant cache structures. In this system, software threads which execute reliability-based critical code regions are mapped onto the protected cores, whereas the threads which execute noncritical regions are mapped to the unprotected ones, dynamically during the execution. Our experimental evaluations indicate that the proposed system improves Silent Data Corruption (SDC) rate by 66% with 22% performance loss and 1.2% more power consumption for selected applications relative to the unprotected caches on average. © Springer International Publishing Switzerland 2016.